IS31LT3910 integrated silicon solution, inc. ? www.issi.com rev.a, 11/08/2011 1 universal high brightness led driver with temperature compensation november 2011 general description the IS31LT3910 is a peak current mode control led driver ic. the IS31LT3910 operat es in constant off-time mode. it allows efficient operation of high brightness (hb) leds with voltage sources ranging from 8vdc to 450dc or 110vac/220vac. the IS31LT3910 includes a pwm dimming input that can accept an external control signal with a duty ratio of 0 - 100% and a frequency of up to a few kilohertz. it also includes a 0 - 240mv linear dimming input which can be used both for linear dimming and temperature compensation of the led current. the IS31LT3910 is ideally suited for buck led drivers. since the IS31LT3910 operates in peak current mode control, the controller achi eves good output current regulation without the need for any loop compensation. it achieves good pwm dimming response because the response time is limited only by the rate of rise and fall of the inductor current, enabling very fast rise and fall time. features ? wide input range from 8vdc to 450dc or 110vac/220 vac ? temperature compensation to regulate led current ? application from a few ma to more than 1a output ? constant off-time operation ? linear and pwm dimming capability ? switch mode controller for single switch led drivers ? requires few external components for operation applications ? dc/dc or ac/dc led driver applications ? general purpose constant current source ? signal and decorative led lighting ? backlighting led driver application circuit d 1 l1 vref IS31LT3910 ld pwmd toff gnd vin gate cs r cs q 1 vindc 8~ 450v r 1 ntc c off rin cin leds c 1 c 2
IS31LT3910 integrated silicon solution, inc. ? www.issi.com rev.a, 11/08/2011 2 pin configurations pin description pin pin no. description v ref 1 this pin provides referenc e a voltage of 1.2v, no bypass capacitor is needed. pwmd 2 this is the pwm dimming input of the ic. when this pin is pulled to gnd, the gate dr iver is turned off. when the pin is pulled high, the gate driver operates normally. ld 3 this pin is the linear dimming input and sets the current sense threshold as long as the voltage at the pin is less than 240mv (typ.). it can also used as temperature compensation threshold voltage. gnd 4 ground return for all internal circuitry. this pin must be electrically connected to ground. gate 5 this pin is the output gate driver for an external n-channel power mosfet. cs 6 this pin is the current sense pin used to sense the mosfet current by means of an external sense resistor. when this pin exceeds the lower of either the internal 240mv or the voltage at the ld pin, the gate output goes low. t off 7 this pin sets the off time of the power mosfet. if left floating then the off time will be 510ns. when a capacitor is connected between t off and gnd, the off time is increased. v in 8 this pin is the input of an 8v to 450v voltage supply through a resistor, clamped at 7.1v interna lly, it must be bypassed with a capacitor to gnd. package pin configurations (top view) sop-8 v ref gnd ld pwmd v in t off cs gate copyright ? ? ? 2011 ? integrated ? silicon ? solution, ? inc. ? all ? rights ? reserved. ? issi ? reserves ? the ? right ? to ? make ? changes ? to ? this ? specification ? and ? its ? products ? at ? any ? time ? without ? notice. ? issi ? assumes ? no ? liability ? arising ? out ? of ? the ? application ? or ? use ? of ? any ? information, ? products ? or ? services ? described ? herein. ? customers ? are ? advised ? to ? obtain ? the ? latest ? version ? of ? this ? device ? specification ? before ? relying ? on ? any ? published ? information ? and ? before ? placing ? orders ? for ? products. ? integrated ? silicon ? solution, ? inc. ? does ? not ? recommend ? the ? use ? of ? any ? of ? its ? products ? in ? life ? support ? applications ? where ? the ? failure ? or ? malfunction ? of ? the ? product ? can ? reasonably ? be ? expected ? to ? cause ? failure ? of ? the ? life ? support ? system ? or ? to ? significantly ? affect ? its ? safety ? or ? effectiveness. ? products ? are ? not ? authorized ? for ? use ? in ? such ? applications ? unless ? integrated ? silicon ? solution, ? inc. ? receives ? written ? assurance ? to ? its ? satisfaction, ? that: ? a.) ? the ? risk ? of ? injury ? or ? damage ? has ? been ? minimized; ? b.) ? the ? user ? assume ? all ? such ? risks; ? and ? c.) ? potential ? liability ? of ? integrated ? silicon ? solution, ? inc ? is ? adequately ? protected ? under ? the ? circumstances
IS31LT3910 integrated silicon solution, inc. ? www.issi.com rev.a, 11/08/2011 3 ordering information industrial rage: -40c to +85c order part no. package qty/reel IS31LT3910-grls2-tr sop-8, lead-free 2500
IS31LT3910 integrated silicon solution, inc. ? www.issi.com rev.a, 11/08/2011 4 absolute maximum ratings parameter value v in pin voltage to gnd -0.3v to 8v cs, ld, pwmd, gate, toff, vref pin voltage to gnd -0.3v to 6v v in pin input current range (note1) 1ma to 10ma junction temperature range -40c to 150c storage temperature range -65c to 150c esd human model 2000v r ja 80c/w note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicat ed under recommended operating cond itions is not implied. exposure to absolute-maximum-rated conditi ons for extended periods ma y affect device reliability. electrical characteristics (the specifications are at t a =25c and v indc =10v (note 1), r in =2k, unless otherwise noted) symbol parameter conditions min. typ. max. unit v indc input dc supply voltage range connect a decent resistor from dc supply voltage to v in pin note 2 8 450 v v in_clamp v in clamp voltage (note 3) 6.6 7.1 7.6 v i in operation current range v in =6v gate floating 0.32 0.5 0.64 ma uvlo undervoltage lockout threshold v in rising 6.0 6.5 6.9 v uvlo undervoltage lockout hysteresis v in falling 500 mv v en(lo) pin pwmd input low voltage 1.2 v v en(hi) pin pwmd input high voltage 2 v r en pin pwmd pull-up resistance 75 100 125 k ? v cs,th current sense pull-in threshold voltage 215 240 265 mv v ld linear dimming pin voltage low threshold 0.05 mv linear dimming pin voltage high threshold 0.24 mv t blank current sense blanking interval 400 480 550 ns t delay delay to output v cs =v cs,th +50mv after t blank 30 ns t off off time t off pin floating 420 510 600 ns t rise gate output rise time c gate =500pf 19 ns t fall gate output fall time c gate =500pf 29 ns v ref ref pin voltage 1.12 1.20 1.30 v v refload load regulation of reference voltage i ref =0~500ua,pwmd=5.0v 0.5 5 mv note 1: all parameters are tested at 25c. specificat ions over temperature are guaranteed by design. note 2: v indc is the power supply to led, and there should be an appropriate resistor between v indc and v in . note 3: beyond the input current range, v in may not clamp at 7.1v.
IS31LT3910 integrated silicon solution, inc. ? www.issi.com rev.a, 11/08/2011 5 application information the IS31LT3910 is optimized to drive buck led drivers using peak current mode control. this control method provides fairly accurate led current control without the need for a high side current sensing or the design of any additional loop compensation. the ic uses very few external components and provides for either linear or pwm control of the led current. a capacitor connected to the t off pin programs the off- time of the oscillator insi de. the oscillator produces pulses at regular intervals. these pulses set the sr flip- flop in the IS31LT3910 which causes the gate driver to turn on. when the mosfet turns on, the current through the inductor starts ramping up. this current flows through the external sense resistor r cs and produces a ramp voltage at the cs pin. the comparators are constantly comparing the cs pin voltage to both the voltage at the ld pin and the internal 240mv. once the blanking time is complete, the output of these comparators is allowed to reset the flip flop. when the output of either one of the two comparators goes high, the flip flop is reset and the gate output goes low. if neither of the comparator goes high the gate keeps high. assuming a 30% ripple in the inductor, the current sense resistor r cs can be set by using: (a) i . ) v(orv . r led ld cs ? ? 15 1 24 0 a constant off-time peak current control scheme can easily operate at duty cycles greater than 0.5 and also gives inherent input voltage rejection making the led current almost insensitive to input voltage variations. input voltage regulator when a voltage is applied through a suitable input resistor to the vin pin, the IS31LT3910 maintains a constant 7.1v typ. at the v in pin. this voltage is used to power the ic. the v in pin must be bypassed by a low esr capacitor to provide a low impedance path for the high frequency current of the output gate driver. the input current drawn from the v in pin is a sum of the 0.5ma(typ)current drawn by the internal circuit and the current drawn by the gate driver (which in turn depends on the switching frequency and the gate charge of the external mosfet). s g in f q ma i ? ? ? 5 . 0 in the above equation, f s is the switching frequency and q g is the gate charge of the external mosfet (which can be obtained from the datasheet of the mosfet). current sense the current sense input of the IS31LT3910 goes to the non-inverting inputs of two co mparators. the inverting terminal of oe comparator is tied to an internal 240mv reference whereas the inverting terminal of the other comparator is connected to the ld pin. the outputs of both these comparat ors are fed into an or gate and the output of the or gate is fed into the reset pin of the flip-flop. thus, the com parator which has the lowest voltage at the inverting terminal determines when the gate output is turned off. the outputs of the comparators also include a typical 480ns blanking time which prevents spurious turn-offs of the external mosfet due to the turn-on spike normally present in peak current mode control. in rare cases, this internal blanking time might not be enough to filter out the turn-on spike. in these cases, an external rc filter needs to be added between the external sense resistor (r cs ) and the cs pin. please note that the comparators are relatively fast with a typical 80ns response time. a proper layout minimizing external inductances will prevent false triggering of these comparators. oscillator the oscillator in the IS31LT3910 is controlled by a single capacitor connected at the t off pin. the equation governing the toff-time of oscillation period is given by: ) 10 1 ( 10 51 . 0 ) ( 6 _ pf c s t off time off ? ? ? ? ? linear dimming the linear dimming pin is used to control the led current. an external voltage ranging from 50mv to 240mv can be applied to the ld pin to adjust the led current during operation. ther e are two cases when it may be necessary to use the linear dimming pin. ? in some cases, it may not be possible to find the exact r cs value required to obtain the led current when the internal 240mv is used. in these cases, an external voltage divider from the vin pin can be connected to the ld pin to obtain a voltage (less than 240mv) corresponding to the desired voltage across r cs . ? linear dimming may be desired to adjust the current level to reduce the brightness of the leds. connecting a resistor between the vref pin and the ld pin, and also connecting an ntc thermistor between the ld pin and ground (refer to application circuit), the IS31LT3910 is able to realize the temperature compensation function
IS31LT3910 integrated silicon solution, inc. ? www.issi.com rev.a, 11/08/2011 6 (see more detail in temperature compensation section). to use the internal 240mv, the ld pin must be connected to pwmd pin. pwm dimming pwm dimming can be achieved by driving the pwmd pin with a low frequency square wave signal. when the pwm signal is low, the gate driver is disabled and when the pwmd signal is high, the gate driver is enabled. since the pwmd signal does not turn off the other parts of the ic, the response of the IS31LT3910 to the pwmd signal is almost instantaneous. the rate of rise and fall of the led current is thus determined solely by the rise and fall times of the inductor current. to disable pwm dimming function, leave the pwmd pin floating. temperature compensation IS31LT3910 provides thermal protection for your leds. refer to application circuit, adding a ntc themistor close to the leds string will realize the temperature compensation of leds current. if the temperature of the leds rises, the resistance of the ntc thermistor decreases until the voltage of the ld pin falls below 0.24v. then the average current is controlled by the ld pin and the temperature compensation function starts. the formula is given as below: 24 . 0 1 ? ? ? ntc ntc r r vref r assuming a 30% ripple in the inductor, the temperature compensated continuous current may be computed as: 15 . 1 * ) ( 1 rs r r vref r iout ntc ntc ? ? ? ? make sure the value of r1 is more than 1k. when the ld pin voltage reduces to less than 50mv, the chip is shutdown . after the ambient temperature returns to a safe temperature the current will return to the set value. example dc input voltage: v indc =230v output led strings: v o =134.4v (42 leds in series, 3.2v for each one), i o_avg =160ma (8 parallels leds, 20ma for each one) ic input resistor (r in ) and hold capacitor (c in ) k i v v r in in indc in 223 1 0 . 7 230 ? ? ? ? ? parallel two 430 k ? in c is chosen to be 10uf/ 40v capacitor t off time regulation cap acitor (coff) and toff time for high output voltage, low output current application, we need shorter t off time to obtain the smaller application inductor. for high output current application, it is suggested that the frequency is set to not more than 50khz (typical 25~30khz). in IS31LT3910, ) 10 1 ( 10 51 . 0 6 _ pf c t off time off ? ? ? ? ? so, apply coff =150pf, then t off =8.16us current sense r esistor (rcs) design for low current ripple will also improve current accuracy but it will require a large value of inductor. high current ripple allows a lower cost inductor. so we need to consider these two factors when selecting an inductor. a capacitor placed in parallel with the array of leds can be used to reduce the led current ripple while keeping the same average current. a typical value is 1uf should be used. since the output average i o_avg = 160ma, assume 50% current ripple, then ma ma i ripple 40 160 % 50 2 1 2 1 ? ? ? ? ma i i ripple peak o 200 2 1 i o_avg _ ? ? ? ? ? ? 2 . 1 200 24 . 0 ma v r cs the inductor (l1) chosen the inductor value depends on the ripple current in the leds. toff=8.16us mh i t v l ripple off o 7 . 13 80 16 . 8 4 . 134 ? ? ? ? ? the inductor chosen should have a saturation current higher than the peak output current and a continuous current rating above the required mean output current.
IS31LT3910 integrated silicon solution, inc. ? www.issi.com rev.a, 11/08/2011 7 the dc resistance (dcr) of the inductor is also essential when choosing an inductor. bigger dcr will lead to more heat. the value of the inductor will reduce as its temperature rises, le ading to higher current ripple, which in turn, reduces the average output current. mosfet (q1) and diode (d1) the peak voltage seen by the mosfet is equal to the maximum input voltage. using a 50% safety rating, indc fet v v ? ? 5 . 1 the maximum rms current through the mosfet depends on the maximum current. hence, the current rating of the mosfet is: % 150 ? ? peak fet i i for this application, choose a mosfet 600v, 1a to 2a. 2n60 is good choice. the peak voltage rating of the diode is the same as the fet. the current range of the diode is: % 150 ? ? peak diode i i for this example, 600v/1a fast recovery diode is recommended.
IS31LT3910 integrated silicon solution, inc. ? www.issi.com rev.a, 11/08/2011 8 package information sop-8
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